Power input block: U$1 connector
The raw DC supply comes in on this 2-pin connector. Pin P1 goes straight onto the main unregulated rail (feeding the transformer center tap, the regulator input, and the two bulk caps); pin P0 is the common ground return. As with the dimmer board, there's no series/reverse-protection diode here — correct polarity matters.
Bulk filtering: C2 + C3 (3300µF/35V each, in parallel)
Sitting across the raw rail (positive to the input node, negative to ground), these absorb the large pulsed currents the output MOSFETs pull from the supply every time they switch, keeping the center-tap rail from sagging or ringing hard at each transition.
Regulated supply block: IC2 (78XXS, populated as 7809) + R2 (220R)
IC2 drops the raw input down to a clean 9V. Rather than feeding IC1's VDD directly, the regulator's output goes through R2 (220R) first — a small series resistor into the 4047's supply pin. Notably, there's no local bypass/decoupling capacitor sitting right at IC1's VDD pin in this design (C2/C3 are the only caps on that side, and they're on the raw rail, not the regulated one) — worth keeping in mind since this rail sits next to a hard-switching power stage.
Oscillator block: IC1 (CD4047) + R1 (1k) + R4 (10k trimmer) + C1 (0.47µF)
C1 connects directly across the chip's C and R/C pins (the timing cap). The timing resistor is R1 in series with R4, run between the R and R/C pins — and R4's wiper is shorted back to one end, so like the dimmer board's trimmer, it's wired as a simple adjustable two-terminal resistor rather than a true potentiometer divider. R4 is the frequency-trim knob. The chip's AST/!AST/-T pins are tied together, and RES/RET/+T/VSS are all tied to ground — the standard hookup that puts the 4047 into continuous free-running astable mode (no external trigger). It free-runs and puts out two complementary square waves on Q and !Q.
Push-pull driver stage: Q1/Q3 + R5, and Q2/Q4 + R6
Each 4047 output feeds a discrete complementary buffer rather than driving the power MOSFETs directly. Q drives Q1 (NPN, SS8050) and Q3 (PNP, SS8550) through the shared 10R base resistor R5; !Q drives Q2/Q4 the same way through R6. In each pair, the NPN's collector sits on the raw +rail and the PNP's collector sits on ground, with both emitters tied together as the output node — a classic discrete totem-pole buffer, needed because the 4047's own outputs can't source/sink enough current to slew the power MOSFETs' gate capacitance quickly.
Gate-drive block: R7–R10 (10R each) + R11/R12 (10k each)
Each power MOSFET gets its own series gate resistor (R7→Q5, R8→Q6, R9→Q7, R10→Q8) even though the MOSFETs are paralleled in pairs — correct practice, since it damps ringing and stops parasitic oscillation between paralleled devices sharing one driver node. R11 and R12 are shared 10k pulldowns on each pair's gate node, holding the MOSFETs off if the driver stage output is ever floating.
Power switching / output stage: Q5+Q6 and Q7+Q8 (IRF3205) + TERM1/TERM2/TERM-CT
Q5 and Q6 are paralleled (drains tied together, sources tied to ground) and their common drain feeds TERM2. Q7 and Q8 are paralleled the same way, feeding TERM1. TERM-CT ties directly to the raw +rail. Read together, this is a push-pull drive into a center-tapped transformer primary: TERM-CT is the center tap, TERM1/TERM2 are the two winding ends, and each end gets alternately pulled to ground by its MOSFET pair while the center tap stays at the supply rail — one classic way to turn a DC rail into an AC square wave. Small note: Q5–Q8 are built on the "IRF740" library deviceset with the value field overridden to "IRF3205" — worth double-checking that the footprint/ratings actually match the part you intend to populate, since those are quite different devices electrically.
Indicator block: R3 (10k) + LED1
R3 feeds LED1 from the regulated 9V rail to ground — a simple power-on indicator, separate from R2 (which only feeds the oscillator's VDD).
How it comes together
IC1 free-runs at a rate set by R1+R4 and C1, producing two antiphase square waves. Each phase is buffered through a discrete push-pull driver (Q1/Q3 or Q2/Q4) to get enough peak current to switch a pair of paralleled IRF3205s quickly. Those MOSFET pairs alternately pull each end of the transformer's center-tapped primary to ground while the center tap sits on the raw DC rail — driving the transformer push-pull at the oscillator's frequency. Given the topology (center-tapped push-pull into a transformer, big paralleled MOSFETs, large bulk caps), this reads as a DC-to-AC square-wave inverter, and R4's trim range is almost certainly meant to dial the switching frequency in to match a target mains frequency (50/60Hz) rather than anything higher — worth confirming against the transformer you're actually driving, since running it off-frequency from what the transformer/load expects is the main thing to get right here.
you-tube video with all files :
https://www.youtube.com/watch?v=C7B8RIV5g_g
cd4047 IRF3205 12V 500W 60Hz Inverter




